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Post-CMP Cleaning Technique by SEZ Cleaning of Backside by Wet Etching
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Published in Semiconductor World, March 1997
Kei KINOSHITA, SEZ Application dept, Sumitomo Electronics Co.,Ltd.
Now that the time for the 0.35µm processing has come, the introduction of the CMP technique into DRAM has been actively promoted. However, few of a variety of problems on introducing CMP have still remained to be solved. Among them, one of the important issues needed to be solved for its introduction into the mass production lines, which places emphasis on cleanness, is contamination with particles and heavy metals generated by slurry. Although various cleaning methods have been put to practical use 1)-3), the major concern of many of those cleaning techniques currently in debate is regarding how to clean the device surface, which directly affects the defect rate. To date, few discussions have been made on the cleaning of the wafer backside, which is expected to be a focal topic in the 256 M DRAM process requiring a microstructuring at 0.25 µm level ....
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