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A Novel Spin-Etch Planarization Process for Dual-Damascene Copper Interconnects


Published at the Electrochemical Society - 1999 Joint International Meeting Sixth International Symposium on Cleaning Technology in Semiconductor Device Manufacturing Honolulu, Hawaii
October 17-22, 1999
M. Fury, Silterra, J. Levert and S. Mukherjee, Allied Signal, D. DeBear, SEZ America, Inc.

Abstract - A novel processing approach called Spin-Etch Planarization (SEP) has been developed for planarizing dual-damascene copper interconnects. This approach is based on controlled chemical removal of metal films by dispensing a reactive etchant solution on the substrate's surface while it is spinning. The materials being planarized have no mechanical contact with any solid surfaces such as pads or slurry particles, making SEP applicable to polymeric or low-k dielectrics having a lower modulus than dense SiO2. SEP also has the added benefits of efficient and effective cleaning and dry-in/dry-out operation.
Etch rate and non-uniformity of blanket electroplated and PVD copper on 200 mm substrates has been obtained. Etch rates of 14,000 Å /min with 3-sigma non-uniformity of 9.2% have been observed with one etching solution reported here. Preliminary results on 200 mm patterned electroplated copper wafers indicate that SEP has an inherent ability to planarize features of sizes 1 µm and below. The removal of copper with the present chemistry is highly selective to typically integrated barrier metals ....

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