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SEZ and Leading Semiconductor Manufacturer to Develop Advances FEOL Cleaning Solutions for Sub-65-nm Device Nodes
Partnership now Expands into High-Volume FEOL Cleans for Memory Devices
VILLACH, Austria—July 12, 2005—The SEZ Group (SWX: SEZN), the market leader and premier innovator in single-wafer cleaning solutions for the semiconductor industry, today announced it has entered into a joint development program (JDP) with a leading memory semiconductor manufacturer, targeting high-volume front-end-of-line (FEOL) cleans. The two companies will collaborate on advanced single-wafer wet solutions that significantly shorten cycle times, enabling higher yields and reduced costs for sub-65-nm device nodes. A key focus of this effort will be developing highly efficient, selective and damage-free FEOL cleans that are compatible with high-volume manufacturing. The JDP will also pursue solutions for delicate FEOL structures, which traditional batch cleaning technologies are unable to handle.
"We are very pleased to be partnering with this memory technology leader," stated Herwig Petschnig, SEZ's chief operating officer for SEZ Asia-Pacific. "This agreement expands upon the existing relationship between our two companies, leveraging successful joint work already completed, and underlines the convergence between the advanced technology needs of memory production and SEZ's capabilities, experience and technical roadmap. Just as SEZ pioneered the single-wafer wet technology now widely used in the BEOL, we are leading the industry transition to FEOL single-wafer processes. Together with our partner companies, SEZ will address the solutions that these processes require as the industry moves below 65 nm."
This latest partnership represents a key milestone for the industry¾not only because of its focus on resolving the challenges associated with deep-submicron FEOL cleans, but also because it underscores a significant shift in mindset among semiconductor manufacturers across the board. The initial BEOL conversion from batch to single-wafer processing was spearheaded by logic manufacturers, whose critical cleaning requirements were more stringent than those of memory providers. Today, having seen the benefits of single-wafer technology, memory makers are leapfrogging their counterparts in the logic business and proactively pursuing the transition to single-wafer for FEOL processes. This SEZ JDP will thus enable volume production of highly advanced semiconductor ICs.
The SEZ Group will be exhibiting at SEMICON West 2005, July 12-14, at the Moscone Convention Center in San Francisco. Readers interested in learning more about this JDP, as well the company's products, technology and other development programs, are invited to visit the SEZ Group in the North Hall at Booth #5568.
About SEZ Group
The SEZ Group is the leading provider of single-wafer, wet-processing solutions for the global semiconductor industry, with an installed base of over 950 tools. The company maintains operations in Asia-Pacific, Europe, Japan, and North America. SEZ Holding AG is traded on the SWX Swiss Exchange under the symbol SEZN. Additional information about the company is available on the Internet at www.sez.com
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