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SEZ >  Services  >  Technical Publications  >  Archives
Archives
Nov-01: New Process Scheme for Wafer Thinning and Stress-free Separation of Ultra Thin ICs
 
Nov-01: 20 Percent Efficient Flexible Silicon Solar Cells
 
Mar-01: In Situ Endpoint Control Saves Chemicals in Wet Processing
 
Mar-01: New Dicing and Thinning Concept Improves Mechanical Reliability of Ultra Thin Silicon
 
Apr-00: Wafer Thinning and Strength Enhancement to Meet Emerging Packaging Requirements
 
Mar-00: Single Wafer Processor SEZ Spin Processor
 
Jan-00: Wafer Backside Spin-Process Contamination Elimination for Advanced Copper Device Applications
 
Dez-99: Spin-Etch Planarization Process for Copper Damascene Interconnects
 
Nov-99: Addressing Cu contamination via spin-etch cleaning
 
Oct-99: Etching Silicon Nitride and Silicon Oxide using Ethylene Glycol - Hydroflouric Acid Mixtures
 
Oct-99: A Novel Wafer Backside Spin-Process Contamination Elimination Technique ...
 
Oct-99: A Novel Spin-Etch Planarization Process for Dual-Damascene Copper Interconnects
 
Sep-99: Polysilicon Overfill Etch Back Using Wet Chemical Spin Etch Technology
 
Sep-99: Photolithography Yield Enhancement Due to Reduced Consumption of the Usable Depth of Focus Resulting
 
May-99: Wafer Backsides: The Key to Future Technologies
 
Apr-99: CSE (Chemical Spin Etching) Backside and Bevel Cleaning of Cu Wafers
 
Apr-99: Single-Wafer Polymer Removal for 0.18-micron to 0.25-micron Technology
 
Nov-98: Eliminating backgrind defects with wet chemical etching
 
Nov-98: 300mm Single Wafer Wet Etching
 
Jun-98: Wet Etching of Silicon Wafers
 
Mar-97: Post-CMP Cleaning Technique by SEZ Cleaning of Backside by Wet Etching
 
Sep-96: Backside film removal and its impact on semiconductor production
 

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